le schéma avance

This commit is contained in:
Laurent Claude 2023-07-09 14:48:19 +02:00
parent 8eff168114
commit 80396c4b2f
5 changed files with 3076 additions and 1575 deletions

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@ -3,10 +3,12 @@
"active_layer": 0, "active_layer": 0,
"active_layer_preset": "All Layers", "active_layer_preset": "All Layers",
"auto_track_width": true, "auto_track_width": true,
"hidden_netclasses": [],
"hidden_nets": [], "hidden_nets": [],
"high_contrast_mode": 0, "high_contrast_mode": 0,
"net_color_mode": 1, "net_color_mode": 1,
"opacity": { "opacity": {
"images": 0.6,
"pads": 1.0, "pads": 1.0,
"tracks": 1.0, "tracks": 1.0,
"vias": 1.0, "vias": 1.0,

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@ -1,5 +1,6 @@
{ {
"board": { "board": {
"3dviewports": [],
"design_settings": { "design_settings": {
"defaults": { "defaults": {
"board_outline_line_width": 0.1, "board_outline_line_width": 0.1,
@ -23,7 +24,8 @@
"track_widths": [], "track_widths": [],
"via_dimensions": [] "via_dimensions": []
}, },
"layer_presets": [] "layer_presets": [],
"viewports": []
}, },
"boards": [], "boards": [],
"cvpcb": { "cvpcb": {
@ -207,18 +209,23 @@
"rule_severities": { "rule_severities": {
"bus_definition_conflict": "error", "bus_definition_conflict": "error",
"bus_entry_needed": "error", "bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error", "bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error", "bus_to_net_conflict": "error",
"conflicting_netclasses": "error",
"different_unit_footprint": "error", "different_unit_footprint": "error",
"different_unit_net": "error", "different_unit_net": "error",
"duplicate_reference": "error", "duplicate_reference": "error",
"duplicate_sheet_names": "error", "duplicate_sheet_names": "error",
"endpoint_off_grid": "warning",
"extra_units": "error", "extra_units": "error",
"global_label_dangling": "warning", "global_label_dangling": "warning",
"hier_label_mismatch": "error", "hier_label_mismatch": "error",
"label_dangling": "error", "label_dangling": "error",
"lib_symbol_issues": "warning", "lib_symbol_issues": "warning",
"missing_bidi_pin": "warning",
"missing_input_pin": "warning",
"missing_power_pin": "error",
"missing_unit": "warning",
"multiple_net_names": "warning", "multiple_net_names": "warning",
"net_not_bus_member": "warning", "net_not_bus_member": "warning",
"no_connect_connected": "warning", "no_connect_connected": "warning",
@ -228,6 +235,7 @@
"pin_to_pin": "warning", "pin_to_pin": "warning",
"power_pin_not_driven": "error", "power_pin_not_driven": "error",
"similar_labels": "warning", "similar_labels": "warning",
"simulation_model_issue": "ignore",
"unannotated": "error", "unannotated": "error",
"unit_value_mismatch": "error", "unit_value_mismatch": "error",
"unresolved_variable": "error", "unresolved_variable": "error",
@ -245,7 +253,7 @@
"net_settings": { "net_settings": {
"classes": [ "classes": [
{ {
"bus_width": 12.0, "bus_width": 12,
"clearance": 0.2, "clearance": 0.2,
"diff_pair_gap": 0.25, "diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25, "diff_pair_via_gap": 0.25,
@ -259,13 +267,15 @@
"track_width": 0.25, "track_width": 0.25,
"via_diameter": 0.8, "via_diameter": 0.8,
"via_drill": 0.4, "via_drill": 0.4,
"wire_width": 6.0 "wire_width": 6
} }
], ],
"meta": { "meta": {
"version": 2 "version": 3
}, },
"net_colors": null "net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
}, },
"pcbnew": { "pcbnew": {
"last_paths": { "last_paths": {
@ -281,6 +291,8 @@
"schematic": { "schematic": {
"annotate_start_num": 0, "annotate_start_num": 0,
"drawing": { "drawing": {
"dashed_lines_dash_length_ratio": 12.0,
"dashed_lines_gap_length_ratio": 3.0,
"default_line_thickness": 6.0, "default_line_thickness": 6.0,
"default_text_size": 50.0, "default_text_size": 50.0,
"field_names": [], "field_names": [],
@ -312,7 +324,11 @@
"page_layout_descr_file": "", "page_layout_descr_file": "",
"plot_directory": "", "plot_directory": "",
"spice_adjust_passive_values": false, "spice_adjust_passive_values": false,
"spice_current_sheet_as_root": false,
"spice_external_command": "spice \"%I\"", "spice_external_command": "spice \"%I\"",
"spice_model_current_sheet_as_root": true,
"spice_save_all_currents": false,
"spice_save_all_voltages": false,
"subpart_first_id": 65, "subpart_first_id": 65,
"subpart_id_separator": 0 "subpart_id_separator": 0
}, },

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@ -1 +1,49 @@
Schéma électronique et PCB, réalisé avec le logiciel libre Kicad, de mon horloge Nixie basée sur un ESP32. Schéma électronique et PCB, réalisé avec le logiciel libre Kicad, de mon horloge Nixie basée sur un ESP32.
Utilisation des ports de l'ESP32 :
----------------------------------
Name | No. | Type | Function | Utilisation
--- | --- | --- | --- | ---
GND | 1 | P | GND |
3V3 | 2 | P | Power supply |
EN | 3 | I | High: on enables the chip.Low: off the chip powers off. |
IO4 | 4 | I/O/T | RTC_GPIO4 GPIO4 TOUCH4 ADC1_CH3 |
IO5 | 5 | I/O/T | RTC_GPIO5 GPIO5 TOUCH5 ADC1_CH4 |
IO6 | 6 | I/O/T | RTC_GPIO6 GPIO6 TOUCH6 ADC1_CH5 |
IO7 | 7 | I/O/T | RTC_GPIO7 GPIO7 TOUCH7 ADC1_CH6 |
IO15 | 8 | I/O/T | RTC_GPIO15 GPIO15 U0RTS ADC2_CH4 XTAL_32K_P |
IO16 | 9 | I/O/T | RTC_GPIO16 GPIO16 U0CTS ADC2_CH5 XTAL_32K_N |
IO17 | 10 | I/O/T | RTC_GPIO17 GPIO17 U1TXD ADC2_CH6 |
IO18 | 11 | I/O/T | RTC_GPIO18 GPIO18 U1RXD ADC2_CH7 CLK_OUT3 |
IO8 | 12 | I/O/T | RTC_GPIO8 GPIO8 TOUCH8 ADC1_CH7 SUBSPICS1 |
IO19 | 13 | I/O/T | RTC_GPIO19 GPIO19 U1RTS ADC2_CH8 CLK_OUT2 USB_D- |
IO20 | 14 | I/O/T | RTC_GPIO20 GPIO20 U1CTS ADC2_CH9 CLK_OUT1 USB_D+ |
IO3 | 15 | I/O/T | RTC_GPIO3 GPIO3 TOUCH3 ADC1_CH2 |
IO46 | 16 | I/O/T | GPIO46 |
IO9 | 17 | I/O/T | RTC_GPIO9 GPIO9 TOUCH9 ADC1_CH8 FSPIHD SUBSPIHD |
IO10 | 18 | I/O/T | RTC_GPIO10 GPIO10 TOUCH10 ADC1_CH9 FSPICS0 FSPIIO4SUBSPICS0 |
IO11 | 19 | I/O/T | RTC_GPIO11 GPIO11 TOUCH11 ADC2_CH0 FSPID FSPIIO5SUBSPID |
IO12 | 20 | I/O/T | RTC_GPIO12 GPIO12 TOUCH12 ADC2_CH1 FSPICLK FSPIIO6SUBSPICLK |
IO13 | 21 | I/O/T | RTC_GPIO13 GPIO13 TOUCH13 ADC2_CH2 FSPIQ FSPIIO7SUBSPIQ |
IO14 | 22 | I/O/T | RTC_GPIO14 GPIO14 TOUCH14 ADC2_CH3 FSPIWP FSPIDQSSUBSPIWP |
IO21 | 23 | I/O/T | RTC_GPIO21 GPIO21 |
IO47 | 24 | I/O/T | SPICLK_P_DIFF GPIO47 SUBSPICLK_P_DIFF |
IO48 | 25 | I/O/T | SPICLK_N_DIFF GPIO48 SUBSPICLK_N_DIFF |
IO45 | 26 | I/O/T | GPIO45 |
IO0 | 27 | I/O/T | RTC_GPIO0 GPIO0 |
NC | 28 | - | NC |
NC | 29 | - | NC |
NC | 30 | - | NC |
IO38 | 31 | I/O/T | GPIO38 FSPIWP SUBSPIWP |
IO39 | 32 | I/O/T | MTCK GPIO39 CLK_OUT3 SUBSPICS1 |
IO40 | 33 | I/O/T | MTDO GPIO40 CLK_OUT2 |
IO41 | 34 | I/O/T | MTDI GPIO41 CLK_OUT1 |
IO42 | 35 | I/O/T | MTMS GPIO42 |
RXD0 | 36 | I/O/T | U0RXD GPIO44 CLK_OUT2 |
TXD0 | 37 | I/O/T | U0TXD GPIO43 CLK_OUT1 |
IO2 | 38 | I/O/T | RTC_GPIO2 GPIO2 TOUCH2 ADC1_CH1 | RAZ
IO1 | 39 | I/O/T | RTC_GPIO1 GPIO1 TOUCH1 ADC1_CH0 |
GND | 40 | P | GND |
EPAD | 41 | P | GND | 123